1. Field of the Invention
The present invention relates to a semiconductor memory device such as EEPROMs of the NAND-cell, NOR-cell, DINOR (Divided bit line NOR)-cell and AND-cell types, and more particularly to a semiconductor memory device having an improved sense amplifier of the current sense type.
2. Description of the Related Art
A sense amplifier in a semiconductor memory device such as a flash memory basically senses the presence/absence or the level of cell current flowing in accordance with data in a memory cell, thereby deciding the value of data. The sense amplifier is usually connected to a bit line (data line) to which a number of memory cells are connected. The sensing scheme is roughly divided into the voltage sense type and the current sense type.
A sense amplifier of the current sense type precharges a bit line isolated from the memory cells to a certain voltage, discharges the bit line through the selected memory cell, and detects the discharged state of the bit line at a sense node connected to the bit line. At the time of data sensing, the bit line is isolated from the current source load to detect the bit line voltage determined from cell data.
A sense amplifier of the voltage sense type, on the other hand, supplies read current flowing in a memory cell via the bit line, thereby sensing data. Also in this case, cell data determines the bit line voltage, and eventually data determination at the sense node connected to the bit line detects a difference in voltage at the sense node based on the difference in cell current.
The sense amplifier of the current sense type and the sense amplifier of the voltage sense type have the following advantages and disadvantages in general. The voltage sense type utilizes charging and discharging bit lines and accordingly has less power consumption. In a mass storage memory with a large bit line capacity, though, charging/discharging is time-consuming and accordingly fast sensing becomes difficult. In addition, the amplitude of the bit line voltage is made relatively large in accordance with cell data and accordingly a noise between adjacent bit lines causes a problem.
In contrast, the sense amplifier of the current sense type senses data while supplying read current flowing in the memory cell via the bit line, thereby enabling fast sensing. In addition, a clamp transistor (presense amplifier) arranged between the bit line and the sense node is used to reduce the amplitude of the bit line voltage in accordance with cell data and accordingly the noise between bit lines hardly causes a problem. Also in this case, however, reading is executed on alternate bit lines, and other bit lines not subjected to reading are grounded and used as shields to exclude influences between bit lines on reading.
To the contrary, the bit line potential may be controlled such that it is always fixed at a constant voltage to exclude influences between bit lines and allow all bit lines to be sensed in parallel on sensing. Such a sense amplifier of the ABL (All Bit Line) type has been proposed (JP 2006-500729T, paragraphs 0062-0068, 0076-0079, FIGS. 7A, 7B, 8 and 13).
In such the sense amplifier of the current sense type, however, advanced fine patterning of devices increases the value of current flowing in the cell source line and elevates the potential on the cell source line as a problem. The elevation of the potential on the cell source line decreases the potential difference between the bit line controlled at a certain potential by a clamp transistor and the cell source line. Accordingly, the drain-source voltage Vds in the selected cell lowers and the gate-source voltage Vds in the selected cell also lowers. As a result, the cell current decreases and causes a failure in reading data out of the selected cell.
To prevent such the read failure, there has been proposed a method called multipath sense, which comprises multiple times of sensing (Patent Document 1). The multipath sense is a method comprising turning off the selected cell after once sense current flows therein at the first sensing, followed by sensing again. Thus, the value of current flowing in the cell source line is suppressed lower than the first sensing and the subsequent sensing can correctly detect the sense current flowing in the selected cell that could not be detected in the previous sensing.
The multipath sense, however, requires multiple times of sensing and accordingly consumes time in sensing as a problem. In particular, storing multivalue data such as 8-value or 16-value data in a memory cell increases times of sensing to 7 or 15. Accordingly, the requirement of multiple times of sensing in a single threshold decision causes a fatal drawback with respect to the reading time.
On the other hand, a control may be considered to elevate the gate voltage on the bit-line clamp transistor in accordance with the elevation of the potential on the cell source line. In this case, however, the potential on the cell source line differs from part to part in the memory cell array. Accordingly, the voltage control of bit lines together causes an excessively controlled bit line and a less controlled bit line as a problem.